Overview of integrated circuit chip packaging

Packaging concept:

1. Narrow sense: The use of membrane technology and microprocessing technology to place elements such as chips on the frame or substrate. Upper layout. Paste fixed connection, lead out terminal, through plastic insulating media pot-seal fixed, forming an overall three-dimensional structure.

2. Generalized: The package body and the substrate are connected and fixed, and assembled into a complete system or electronic products to ensure the comprehensive performance of the entire system.

Functions of the chip package:

1. Transmission function; 2. Transmission circuit signal; 3. Provide heat removal methods; 4. Structural protection and support.

Technical level of packaging engineering:

Packaging engineering begins after the integrated circuit chip is made, including the pasting and fixing of the integrated circuit chip. Interconnect. Encapsulation. Sealed protection. Connect to the circuit board. System assembly until the final product is completed.

The first level: also known as chip-level packaging, refers to the integrated circuit chip and the package substrate or pin between the paste fixed. The circuit connection and packaging protection process makes it a modular (component) element that is easy to pick up and transport and can be connected to the next layer of assembly.

The second layer: The process of composing the circuit card with other electronic components of the multilevel packaging.

Third layer: The process of forming a plurality of second layer completed packaging and assembly circuit cards on the main circuit board, making it a component or subsystem.

Layer 4: Assemble multiple subsystems into a complete electronic product process.

The connection process between integrated circuit components on the chip is also called zero-level packaging, so the packaging project can also be distinguished by five levels.

Packaging category:

1. Number of integrated circuit chips: single chip package (scP) and multi-chip seal (MCP);

2. According to the sealing material: polymer material (plastic) and porcelain;

3. According to the interconnection between the device and the circuit board: pin insertion (PTH) and surface mount (SMT)4. Distribution by pin: One side pin. Two-sided pins. Four-sided pins and bottom pins;

SMT devices are L-shaped. Type J. Type I metal pin.

SIP: Single row package SQP: Miniaturized package MCP: metal pot package DIP: Double row package CSP: chip size package QFP: four side flat seal PGA: dot matrix package BGA: Ball grid array package LCCC: no wire ceramic chip media.